1. Field of the Invention
The present invention relates to a semiconductor simulation method for determining an impurity profile in a substrate or a physical quantity of a prescribed portion of a semiconductor device through calculation.
The invention also relates to a semiconductor device simulation method for predicting an impurity profile inside a semiconductor device or a device characteristic of a semiconductor device and for optimizing a device structure or manufacturing process conditions by process/device simulations.
2. Description of the Related Art
In the semiconductor manufacture, simulations of a concentration profile of an impurity that is implanted in a substrate are widely used. Such a simulation makes it possible to evaluate, before actual manufacturing, the optimized concentration profile and optimized conditions for required specifications, and hence contributes to shortening of a development period and reduction of a manufacturing cost.
In such a simulation, it is ideal to correctly determine impurity profiles for all kinds of process conditions by using a calculation method for determining an impurity profile with high accuracy (e.g., high-accuracy simulators) or by actual measurement. However, this is not realistic because it requires an unduly long time and a high cost.
In view of the above, a method is employed in which impurity profiles for several kinds of process conditions are determined in advance by using a means for determining an impurity profile with high accuracy, and interpolation is performed for another kind of process conditions based on thus-determined impurity profiles.
However, even in the method of performing such interpolation, it is necessary to determine impurity profiles for several kinds of process conditions by using a highly accurate calculation method. To improve the interpolation accuracy, it is necessary to perform calculations for as many kinds of process conditions as possible.
It is conceivable to determine impurity profiles for several kinds of process conditions by using a highly accurate calculation method and change some process condition items to conditions different from actual ones so that results of a process simulation satisfy those impurity profiles. However, it is not easy to determine condition items and values to be changed and much experience and time are needed to make such a determination.
In development of semiconductor devices such as an MOS transistor, the prediction of device characteristics of the semiconductor device by process/device simulations and the simulation of the semiconductor device to optimize the device structure or the manufacturing process conditions are key factors. The process/device simulation is generally classified into: (1) a process simulation for determining the topographies of a semiconductor device or an impurity profile (or concentration profile) inside a semiconductor device for the input of semiconductor device manufacturing conditions and so forth; and (2) a device simulation for determining electrical characteristics of a semiconductor device for the input of an impurity profile inside the semiconductor device and topographies and voltage conditions of the semiconductor device.
As for the device simulation, a correct two-dimensional impurity profile inside a semiconductor device for its manufacturing process conditions and topographies or structures is needed. Example methods for determining a two-dimensional impurity profile are a post-measurement data conversion method, a complex angle lap method, and a staining method. In recent years, an inverse modeling method has been proposed that determines an impurity profile inside a semiconductor device from device electrical or characteristics of the semiconductor device.
However, the performance of each of the post-measurement data conversion method, the complex angle lap method, and the staining method is still insufficient for practical use in terms of determination of a correct two-dimensional impurity profile inside a semiconductor device.
The inverse modeling method is mainly used for determining an impurity profile inside a semiconductor device for its particular topographies or structure and device characteristics (i.e., its electrical characteristics), and its application range is limited to such cases as changing the gate length or the gate oxide film thickness. For example, the inverse modeling method has difficulty in deriving a consistent impurity profile for devices having different channel lengths and cannot change such manufacturing process conditions as conditions of a heat treatment for impurity diffusion after execution of an impurity implantation step in predicting a device characteristic by a device simulation by using a determined impurity profile. That is, the application range is quite limited.